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| # | Part: | Description: | Manuf. | Package | Pins | T°min | T°max | PDF size |
| 1. |  STEVAL-ISA077V1 | High efficiency synchronous rectifier step-up converter demonstration board based on the L6920DB | STMicroelectronics | STMICROELECTRONICS | - | - | - | 82 Kb |
| 2. | STEVAL-MKI077V1 | MEMS: demonstration board based on the LPR4150AL | STMicroelectronics | STMICROELECTRONICS | - | - | - | 103 Kb |
| 3. | IDT77V106 | 3.3V ATM PHY for 25.6 and 51.2 Mbps | Integrated Device Technology | IDT | - | - | - | 234 Kb |
| 4. | IDT77V106L200TFI | 3.3V ATM PHY for 25.6 and 51.2 Mbps | Integrated Device Technology | IDT | - | - | - | 234 Kb |
| 5. | IDT77V106L25 | 3.3V ATM PHY for 25.6 and 51.2 Mbps | Integrated Device Technology | IDT | - | - | - | 234 Kb |
| 6. | IDT77V107 | Single ATM PHY for 25.6 and 51.2 Mbps with Utopia Level 2 | Integrated Device Technology | IDT | - | - | - | 190 Kb |
| 7. | IDT77V107L25PF | Single ATM PHY for 25.6 and 51.2 Mbps with Utopia Level 2 | Integrated Device Technology | IDT | - | - | - | 190 Kb |
| 8. | IDT77V107L25PFI | Single ATM PHY for 25.6 and 51.2 Mbps with Utopia Level 2 | Integrated Device Technology | IDT | - | - | - | 190 Kb |
| 9. | IDT77V1253 | TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS | Integrated Device Technology | IDT | - | - | - | 485 Kb |
| 10. | IDT77V1253L25PGI | TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS | Integrated Device Technology | IDT | - | - | - | 485 Kb |
| 11. | IDT77V1254L25 | Quad Port PHY (Physical Layer) for 25.6 and 51.2 ATM Networks | Integrated Device Technology | IDT | - | - | - | 583 Kb |
| 12. | IDT77V1254L25L25PG | Quad Port PHY (Physical Layer) for 25.6 and 51.2 ATM Networks | Integrated Device Technology | IDT | - | - | - | 583 Kb |
| 13. | IDT77V1254L25L25PGI | Quad Port PHY (Physical Layer) for 25.6 and 51.2 ATM Networks | Integrated Device Technology | IDT | - | - | - | 583 Kb |
| 14. | IDT77V1264L200 | Quad Port PHY (Physical Layer) for 25.6, 51.2, and 204.8 Mbps ATM Networks and Backplane Applications | Integrated Device Technology | IDT | - | - | - | 430 Kb |
| 15. | IDT77V1264L200PGI | Quad Port PHY (Physical Layer) for 25.6, 51.2, and 204.8 Mbps ATM Networks and Backplane Applications | Integrated Device Technology | IDT | - | - | - | 430 Kb |
| 16. | IDT77V126L200 | Single Port PHY (Physical Layer) for 25.6, 51.2, and 204.8 Mbps ATM Networks and Backplane Applications | Integrated Device Technology | IDT | - | - | - | 252 Kb |
| 17. | IDT77V126L200TFI | Single Port PHY (Physical Layer) for 25.6, 51.2, and 204.8 Mbps ATM Networks and Backplane Applications | Integrated Device Technology | IDT | - | - | - | 252 Kb |
| 18. | CY7C1177V18 | 18-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) | Cypress Semiconductor | CYPRESS | - | - | - | 969 Kb |
| 19. | CY7C1277V18 | 36-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) | Cypress Semiconductor | CYPRESS | - | - | - | 1.01 Mb |
| 20. | CY7C1577V18 | 72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) | Cypress Semiconductor | CYPRESS | - | - | - | 960 Kb |
